Silicon nitride (Si3N4) layers are frequently used in the fabrication of semiconductor wafers, for example, in the fabrication of MOSFET gates, memory cells, and precision capacitors. Silicon nitride layers are utilized as an insulation layer over silicon surfaces to electrically isolate conductive components of a semiconductor circuit from one another. Silicon nitride films are also used as a diffusion barrier to protect regions of a semiconductor wafer during local oxidation of silicon due to the slow speed with which oxygen and water vapor diffuse in the nitride. Silicon nitride dielectric films are preferred over silicon dioxide (SiO2) in many applications due to its high dielectric constant (6-9 versus about 4.2 for chemical vapor deposited (CVD) SiO2).
Capacitors are commonly-used electrical components of semiconductor circuitry. A typical capacitor is constructed of two conductive plates separated by a non-conducting dielectric layer. The capacitor is electrically connected to a circuit external of the capacitor. The dielectric layer is preferably comprised of one or more materials having a very high dielectric constant and low leakage current characteristics, for example, SiO2 and Si3N4, with Si3N4 being typically preferred due to its higher dielectric constant.
Silicon nitride is typically deposited upon a silicon surface (including, but not limited to, single crystal, poly, and epitaxial), by low pressure chemical vapor deposition (LPCVD). In a conventional silicon nitride LPCVD deposition, the silicon surface is normally pretreated, for example, by removing the native oxide using a hydrofluoric acid (HF) clean solution. A film of silicon nitride is then deposited on the pretreated surface by LPCVD by reacting dichlorosilane (SiH2Cl2) and ammonia (NH3) over the silicon surface in a hot-wall reactor at about 600 to about 800° C. and a pressure of about 100 mTorr to about 2 Torr.
An alternate process for producing a Si3N4 layer is by rapid thermal nitridation (RTN) of a silicon layer which is annealed in an NH3 or other nitrogen-comprising atmosphere, which reacts with the silicon to produce silicon nitride. However, the growth of the nitride is extremely slow and self-limiting since the NH3 is not capable of adequately diffusing through the growing silicon nitride layer to react with the underlying silicon. The ultimate thickness of a silicon nitride film produced by nitridation is typically only 3 to 4 nm at high temperatures. Such thickness is usually too low to adequately function as a barrier to prevent further oxidation of the silicon surface during subsequent processing, or as a capacitor dielectric layer between two conductive capacitor plates. Further, the electrical quality of this high temperature nitridated layer is poor.
Another described technique for formation of Si3N4 capacitor dielectric layers is to initially nitridize an outer silicon surface to obtain a 20 to 30 angstrom thick layer, and then deposit a silicon nitride film by low pressure chemical vapor deposition of DCS. The drawbacks of these methods include poor electrical performance of the RTN/DCS layer and high thermal budget induced from the high temperature RTN process.
Surface properties of the wafer surface play an important role in the initial growth of films in thin-film processes, which will impact the properties and structure of the thin film that is deposited. Different nucleation and deposition rates occur for the deposition of silicon nitride on different wafer surfaces. This leads to different or degraded electrical characteristics of semiconductor devices having different wafer surfaces that are fabricated using a silicon nitride deposited layer. In addition, deposition of silicon nitride also includes an incubation time at the start of the deposition where there is no apparent deposition of silicon nitride. The incubation time may extend up to several minutes for some surfaces. Surfaces exhibiting such different rates and incubation times include, but are not limited to, one or more of tetraethylorthosilicate (TEOS), borophosphosilicate glass (BPSG), silicon, polysilicon, hemispherical grain (HSG) polysilicon, other doped silicon or polysilicon surfaces, other doped oxides, thermal silicon dioxide, chemical vapor deposited (CVD) silicon dioxide, and plasma enhanced CVD (PECVD) silicon dioxide.
TCS nitride layers (SiCL4 reacted with NH3) have been shown to have much better capacitance (Cp)-leakage performance than silicon nitride layers produced by dichlorosilane (DCS) in DRAM capacity modules. However, there have been problems with nucleation of TCS nitride on certain silicon-based surfaces such as borophosphosilicate glass (BPSG) using current TCS cell nitride processes.
An example of a prior art process for depositing a TCS silicon nitride layer in a DRAM capacity module is described with reference to FIGS. 1A-1B. Referring to FIG. 1A, an exemplary semiconductor wafer fragment 10, shown in a preliminary processing step, comprises a base layer 12, an insulative layer 14 of BPGS formed over base layer 12, an HSG polysilicon layer 16 overlying the BPSG insulative layer 14, and an opening 18. As shown in FIG. 1B, the HSG polysilicon layer 16 is incorporated into a capacitor construction 20 in which a silicon nitride-comprising dielectric layer 22 comprising a TCS nitride layer 24 and a capacitor plate layer 26, are formed over the HSG polysilicon layer 16. In a conventional process, the TCS nitride layer 24 can be deposited over both the BPSG layer 14 and the HSG polysilicon layer 16 by LPCVD by reacting silicon tetrachloride (SiCl4) and ammonia (NH3) over the substrate in a hot-wall reactor at about 500 to about 800° C. and a pressure of about 100 mTorr to about 2 Torr.
As depicted in FIG. 1B, transmission electron microscopy (TEM) cross-sectional images have shown that portion “A” of the TCS nitride layer 24 deposited on the surface of the BPSG substrate 14 to be comparatively thinner (about 15 to about 20 angstroms) than the thickness of portion “B” of the TCS nitride layer 24 deposited on the HSG polysilicon substrate 18 (about 45 to about 50 angstroms).
At a thickness of less than about 20 angstroms, the nitride is not able to prevent the polysilicon electrode from becoming oxidated in the wet re-oxidation step that follows the cell nitride deposition. Consequently, re-oxidation results in the oxidation of the bottom polysilicon electrode. The volume expansion from the polysilicon oxidation will force the BPSG container sidewall to “bulge out” of the wafer surface. These bulges appear as “bubbling” from a top view in a Scanning Electron Microscopy (SEM) image. This is commonly referred to as “BPSG bubbling” and the nitride is said to be “punched through”. These bubblings are fatal physical defects and will result in massive fail of the part. Beside preventing the BPSG bubbling problem, a desirable thickness of nitride on the BPSG also functions as a H2 barrier in the subsequent wet re-oxidation and other processes to protect the active area in the device because H2 could enhance boron diffusion and deactivate the transistor. The poor nucleation of TCS nitride on BPSG has limited the use of TCS nitride to below about 50 angstroms in current DRAM capacity modules.
Therefore, it is desirable to develop an improved process of forming dielectric silicon nitride films with TCS that will overcome the shortcomings of present TCS nitride processes. It is also desirable to provide an improved process to enable the production of a silicon nitride layer using TCS that will be of adequate thickness over substantially all silicon substrates of a device to provide the desired capacitor dielectric properties in a capacitor construction, and improve the characteristics of the fabricated semiconductors devices.